Funding the future: How best to spend limited R&D dollars?

One of the big issues now facing the industry is to how best spend limited funding for research and development, when so much needs to be done. Continued scaling to 20nm and below, a transition to 450mm, 3D integration, device new structures, a bevy of new materials with unknown integration challenges - these are all needed.

These issues are top of mind since I've been asked to moderate a panel on this topic at the upcoming Advanced Semiconductor Manufacturing Conference (ASMC), to be held May 15-18 in Saratoga Springs, NY. The panel, "Competing for R&D Dollars: Funding the Future," will be held on May 16, 2012 from 4:30 to 5:45. The panelists will be:

-- David Bennett, VP Alliances, GLOBALFOUNDRIES;
-- Noreen Harned, VP Marketing, ASML;
-- Subramanian (Subu) Iyer, IBM Fellow, IBM Systems & Technology Group;
-- Nag Patibandla, Sr. Director (Office of CTO), Applied Materials; and
-- Risto Puhakka, President, VLSI Research.

Each panelist will give a brief overview of their perspective on the topic with no more than two slides, and then we'll move into the panel discussion.

I think it's fairly clear that, with the industry's present model, it's going to be difficult to fully finance everything on the wish list. In fact, that's been one of the main arguments against going to 450mm: Wouldn't precious R&D dollars (or euros/yens/RMBs) be better spent on some other endeavor, such as 3D integration?

This isn't a new dilemma, of course. In a SEMI-funded reported published in 2005, Ron Leckie analyzed all the things that were noted in the International Technology Roadmap for Semiconductors (ITRS) and concluded that the funding gap could reach upwards of $9.3 billion by 2010. It's now 2012 and, two years later, Moore's Law is holding firm. On the other hand, there has been a fair amount of consolidation, and a shift to fabless and asset-lite (or capital-lite) business models.

In this blog, over two years ago, I reported that some believed that a massive restructuring is underway that will leave only a handful of companies producing devices at the leading edge. Bob Johnson, VP of research at Gartner, predicts that by 2014 there will be only 10 companies operating at the leading edge: 1-2 non-memory IDMs, 4-5 memory companies, and 3 foundries (speaking at SEMI's 2010 ISS). I haven't seen much to contradict that thinking. The percentage of revenue that chip makers are spending on R&D is fairly low, around 14%. It was at a historical low in 2010, only 12%

The way the industry has been able to get around the funding challenge is through collaboration. Consortia such as SEMATECH and imec are great models of collaboration, enabling companies to work on "pre-competitive" research to share costs and reduce risks. The Common Platform model employed by IBM/Samsung/GLOBALFOUNDRIES is another great example of collaboration. The entire CNSE/Albany Nanotech/G450C effort is perhaps the best example of university, industry, consortia and government working together (as I'm sure will be discussed at ASMC).

What's intriguing to me, though, is if the semiconductor industry will go the way of the automotive and aerospace industries, which have very different models when it comes to cost-sharing and risk-sharing. Mike Splinter of Applied Materials, Steve Newberry of Lam and Paolo Gargini of Intel all made references to those models at this year's ISS.

I don't have the answers, but if you have questions you'd like to pose to the ASMC panel, and aren't going to make it in person, let me know: peters@pennwell.com.