Thursday, September 9, 2010

The Bankability of PV Tech: The New Key to Success

A decidedly non-technical term was in vogue this week at the very technical 25th European Photovoltaic Solar Energy Conference (EUPVSEC). The term “bankability” was often used to describe the likelihood of success of a given technology. In these days of scarce capital, the only projects that will be funded are those that banks and insurers have deemed to be fund-worthy (outside of China anyway). “Banks demand extensive performance and reliability data before funding major installations,” noted one presenter from Applied Materials, claiming that this was “critical for market penetration of a new PV technology.” This particular presenter was discussing the merits of thin film PV tech, but crystalline PV suppliers were making similar arguments regarding the bankability of their own technology, which is arguably more proven and certainly more mainstream.

How this will play out is anybody’s guess, since long-term reliability is somewhat of a guessing game based on an extrapolation of models and limited field tests, particularly when it comes to new materials. Almost all PV module suppliers offer 20-25 year warranties but nobody really knows how panels will withstand the test of time. Corrosion can creep in, plastics can yellow, dopants can move and electromigration can lead to increases in line resistance. Many PV proponents believe solar farms being installed today will live on in perpetuity, since the world will always need power and the sun will always shine, but materials do tend to wear out.

Maybe bankers can intuit the viability of given technology better than expert physicists, but I suspect their questions of bankability will only be answered by reams and reams of data which they are ill-prepared to decipher.

3 Facts from EUPVSEC

The one and only driving factor in the photovoltaics industry is cost per Watt. This is primarily a function of efficiency – how much of the sun’s power is converted to electricity -- and the cost of manufacturing and installation. The ultimate goal of course is to achieve grid parity, where the cost of producing power with PV is the same or better than that achieved by traditional means (coal, hydro, nuclear, natural gas, etc.). That’s Fact #1 (with the obvious exceptions of odd applications such as PV in outerspace and on ladies’ handbags).

Fact #2 is that today’s PV boon is artificially driven by feed in tariffs, tax incentives, politics, unlike “real” market boons such as high brightness LED lighting. It is ironic that the 25th European Photovoltaic Solar Energy Conference (EUPVSEC) is being held in Spain, which just recently renounced FiTs after accruing billions of euros of debt (too much subsidized PV was brought on-line too quickly).

Fact #2 is of little long term significance, however, since billions of dollars (and euros) are being spent to advance PV technology, ultimately bringing about grid parity. This creates a real market for PV and eliminates CO2 emissions, thereby saving the world.

Fact #3 is that China is dominating the photovoltaics manufacturing business. Companies in China are able to manufacture photovoltaics more cost effectively than anywhere in the world, and by all accounts are also implementing new technologies very quickly and effectively. Never mind that their costs are low because they are able to feed energy-hungry manufacturing operations with cheap CO2-belching coal-fired power plants. Surely the CO2 reductions in Europe made possible by PV more than offset the increase in CO2 from China!? No? Well, I said never mind.

Monday, July 26, 2010

10 million solar roofs in U.S. bill passes

The Ten Million Solar Roofs Act of 2010 (S. 3460) was was passed by the Energy and Natural Resources Committee by a vote of 13 to 10 on July 21, 2010. It was introduced by Sen. Bernie Sanders, a member of the Senate energy and environment committees and chairman of the green jobs subcommittee.

The bill sets a goal, to be met through this and other incentive and R&D programs, of installing solar electric or water hearing systems on at least 10 million properties in ten years.

It provides competitive grants through Department of Energy for Fiscal Years 2012-2021, starting with an authorization of $250 million for Fiscal Year 2012. The Department of Energy is directed to provide Congress with a report on recommendations for achieving the ten million solar goal including how to best leverage funds through S. 3460 for Fiscal Years 2013-2021 (those years have an open authorization to provide flexibility to respond to the Department’s recommendations).

Competitive grants to states, tribes, cities, towns, and counties to help them establish or expand solar loan and incentive programs for homeowners, businesses, schools, and other entities. This approach ensures compatibility with existing incentive programs.

Solar systems of 1 megawatt (or thermal equivalent) or less are eligible. No homeowner, business, or school can receive federal/state/local incentives worth more than 50 percent of the cost to purchase and install a solar system (excludes loan programs). 20 percent non-federal cost share. Grantees submit to the Department of Energy an implementation plan including how many solar systems they will deploy under the grant, and how many participants will receive incentives or loans. They will certify that grant funds will be used to establish new programs or supplement, but not supplant, existing solar funding.

Criteria for the grants include ensuring geographic and population size diversity among awardees, and a ensuring a minimum (at least 2 percent of funding) is available to tribes. Preference is also given to grant recipients who have, or will commit to establishing, net metering, interconnection, and other solar access rules consistent with their authorities.

Wednesday, June 16, 2010

Where Have All the New Apps Gone?

Increasingly, we are hearing about consolidation in the semiconductor industry. Bill McClean of IC Insights has perhaps pointed this out most clearly, noting that the top 10 capacity leaders held about 60% of the total 2009 worldwide IC capacity, and the top 15% held a 71% share. Looking at only 300mm capacity, the consolidation is even more obvious: the top 10 leaders held an imposing 84% share with the top 15 companies holding all but 8% of the world's 300mm IC fabrication capacity, according to McClean.

This is good news for those 15 companies, but not such good news for consumers. “With so few companies representing such a large share of the leading-edge IC production, IC Insights' long-held belief that the companies left standing after the ‘shakeout’ will reap the rewards of increased profitability, is now coming true. However, for the IC user, this also means that IC average selling prices are unlikely to decline as they have in the past. The pricing pendulum is now swinging in favor of the IC producers and it may not be swinging back for a long time,” McClean said.

With a greater percentage of spending coming from a shrinking number of companies, semiconductor industry capital spending is becoming more concentrated. Because of this trend, IC industry capacity is also becoming more "concentrated." As tight as overall IC capacity has been in the IC industry since the first half of 2009, 300mm capacity has been even tighter, McClean notes. In 1Q10, 300mm capacity utilization was 97%, which is essentially indicate a "sold out" situation.

With most capital spending in 2010 going toward developing and moving to finer feature sizes (with little going toward adding wafer starts), the availability -- or lack of availability -- of IC devices will become a major factor in the second half of this year. Ion fact, IC Insights believes that one limiting factor to 30% or greater IC market growth in 2010 might be the lack of IC fabrication capacity needed to support such growth.

Also expect higher average selling prices (ASPs) for almost all types of ICs. “Given that almost all DRAM, NAND flash memory, and microprocessors are produced using 300mm wafers, it follows that each of these segments registered increasing average selling prices throughout 2009 and into 2010,” McClean said. “IC Insights believes that buyers of these IC devices should be prepared for similar ASP trends for these products in the second half of this year.”

While all of this is going on – the consolidation, sold-out capacity and higher selling prices for mainstream ICs – I keep thinking about applications that fall outside of the mainstream. Where are those apps that require different types of equipment and materials technology and different process technology? Do they exist? How big of a market do they represent? Might they be a way for suppliers to diversify outside of the mainstream 15-companies-now-controlling-the-spending semiconductor industry?

My list of applications that offer a potential way to diversify for companies offering thin film deposition and patterning capabilities include: MEMS, hard disks and read-write heads, flat panel displays, optical disks, photovoltaics, LEDs, CMOS image sensors, and superconductors. The MEMS market is perhaps the most intriguing of these since it encompasses so many different types of devices, from microphones to sensors to micro-fluidic labs on a chip.

But perhaps the application with most explosive potential is intelligent medicine. Imagine taking a digestable “smart” pill that is in essence an integrated circuit. As that pill works it’s way through your body, it monitors the status of all kinds of functions and reports the results to your iphone or similar device. That kind of technology is, in fact, already here. Proteus BioBed in Redwood City, CA has developed what it call the Raisin™ System (there was an Apple on your desk, a Blackberry on your belt and now a raisin inside, quips Proteus CEO Andrew Thompson). The initial application of the Raisin System is for the treatment of patients with heart failure. The system senses and records the precise time a patient takes one or more microchip-enabled drugs, providing physiologic feedback and decision-support to the patient, caregivers and clinicians, thus facilitating a cost-effective pathway to improved patient outcomes through personalized medicine.

How cool is that!? It doesn’t take much imagination to envision all kinds of medical devices with new and unique requirements that could leverage traditional IC manufacturing technology. This market could be huge, given the aging baby boomer population and over-loaded healthcare system. Consolidation? Who cares? Bring on the new apps!

Friday, January 22, 2010

Moore's Law: Will Lack of R&D Funding Kill It?

In the January issue of Solid State Technology, I wrote about life after the "reset" button and how the lack of R&D funding could well bring an end to Moore's Law.

That very issue was one of the key "take aways" from last week's ISS. What I heard from a variety of speakers is this:

A massive restructuring is underway that will leave only a handful of companies producing devices at the leading edge. Bob Johnson, VP of research at Gartner, predicts that by 2014 there will be only 10 companies operating at the leading edge: 1-2 nonmemory IDMs, 4-5 memory companies, and 3 foundries.

Hundreds of other companies will still be producing devices at somewhat larger dimensions, but the fragmentation is widening between those that can afford the most advanced-node technology, and those who can't. "Those two segments are radically different and they’re going to get even more different," said Handel Jones, CEO of International Business Strategies, also speaking at the Industry Strategy Symposium. Despite that rift there's still growth for those who choose not to push ahead to the advanced nodes. In fact, he expects to see capacity shortages for some of these lagging feature dimensions in the next few years.

Johnson described several economic forces at work that could derail Moore’s Law due to lack of R&D funding. One factor is the number of major IDMs that are moving from a full manufacturing position to an asset-light or fabless position. “The number of companies that are actually participating in the leading edge is shrinking,” Johnson said. “If you look forward about five years, you come to the very realistic assumption that there are going to be at most 10 companies doing leading edge manufacturing. By leading edge, I mean the two most advanced process nodes. Right now, that would be 45nm and 32nm. By 2014, it would be 22nm and 15nm. How many of those companies will be operating at the absolute leading edge, in other words 15nm, by 2014? Just cut those numbers in half,” he said. “You’ve really got about five companies out there that are really going to be seriously considering manufacturing in accordance with the Moore’s Law pace.”

Jones also predicts significant changes over the next 5-10 years. By the time the 22nm generation rolls around in 2012, he predicts there will be only three IDMs: Intel, Samsung and STMicroelectronics, and in terms of foundries working at 22nm, he thinks TSMC and GobalFoundries (which recently acquired Chartered Semiconductor) will be around. The fate of Samsung, which recently entered the foundry business, will depend on the success of their model, he said, adding that SMIC is an unlikely participant, and the capacity of UMC is “unclear.”

A similar situation exists in the memory market. “What we see today is a number of companies in the DRAM, NAND flash and NOR flash businesses, but if you look out two to five years, you’re going to have one or two companies and that’s it,” Jones said. Samsung will again be a major player, with a projected 50% of the DRAM market and 60% of the NAND flash market. “What we see now is Samsung moving ahead very rapidly and the others falling behind. The gap is widening,” he said. Toshiba is a distant second, at least in NAND flash, where Jones expects them to garner 30% of the market.
Johnson said the higher costs of leading edge technology also means that companies must target only very large markets. At the 32nm mode, he said those markets needed to be about $2 billion. “The idea of being able to build a leading edge device that might target a $100 million market... those days are gone,” he said. “If we look at our current forecast and take it out to 2013, there are really only about five major markets that qualify for the greater than $2 billion TAM. That’s PCs, cell phones, video games, TVs and set-top boxes. That includes all the new things we’re seeing coming out of the CES show,” Johnson said.

Another trend that affects the ability of the equipment industry to fund R&D is capital intensity. Long term the trend in capital intensity—simply capital spending as a percent of revenue—has been declining, Johnson noted. In part, this is because people know how to build fabs more efficiently, but it’s also because the industry’s growth rate is declining. Once at 17% CAGR, Johnson said we’re realistically looking at a long term growth rate in the 5%-7% range. “It takes less capital to keep that going,” he said.

One of the main drivers behind this consolidation is price pressure. “The semiconductor industry, even though it’s recovering from a revenue perspective, is not healthy from a profit perspective,” Jones said. “Today, a relatively small number of semiconductor companies are making good profits. The market in 2010 will be comparable to the market in 2007 from a revenue perspective. Unit volumes though are up about 20-30%, so we’ve had an erosion of prices by 20%-30%. We’ve had some efficiency improvements but we’ve also seen a loss in gross profit margin and also a loss in operating income.”

Jones believes this will result in “a significant restructuring” in which “only the top two or three companies in specific markets will survive." The drive from 32nm to 28nm will force additional consolidation, he added.

A similar type of consolidation is seen on the front-end semiconductor manufacturing equipment front (less so on the back-end test and packaging side). Gartner's Johnson said that equipment suppliers will have “lost” about $116 billion in revenue between 2007 and 2014 due to the recession and record low levels of capital expenditures. This equates to about $17.4 billion in lost R&D.

This is happening at the same time when R&D costs are escalating due to a demand for continued shrinks, more advanced device structures and even a move to 450mm wafers (which continues to be a hotly debated topic).

Many believe this consolidation and funding gap has the potential to stop Moore’s Law dead in its tracks, perhaps at the 22nm generation. Jones said that the benefits of scaling, which he measures in terms of cost per gate trend, are not what they once were. The move to 90nm achieved a big cost decline in cost per gate, in part due to the transition from 200mm to 300mm wafers and associated productivity gains, he said. The move to 65nm brought “a fairly reasonable” decline, and then a small decline with 45nm and 32nm transitions. With 22nm, however, he said there actually will be an increase in the cost per gate -- and without a reduction in cost per gate, many will question the need to move to the small feature dimension. "When you look at what applications drive the technology, if it is low-power (such as for handsets), that’s a cost-driven market," Jones said. "Maybe going to a smaller dimensions will not give you the required payback.”

As a result of increasing costs, Jones also sees a reduction in the number of designs at advanced technology nodes. He said for a 28nm design, the costs can easily be in the $100M-150M range, and if you add software it can be up to $200M. “If you look at the normal metrics for R&D, you need 10× revenue from a production point of view. You then need $1.5 billion in revenue -- and of course that happens in only a small number of products,” he said. “After 22nm, the technology gets even tougher. The two year cycle is fading fast.”

Bob Bruck, VP of Intel's technology and manufacturing group and GM of technology manufacturing engineering, also spoke at ISS, adding that the number of fabs built each year has been declining: less than ten are expected to be built in 2011 and 2012, respectively (the majority of those being 300mm fabs). The cost of a fab is about $4B, a pilot line costs $1B-$2B, and an advanced R&D process team can cost $500M-$1B. “You’ve got to have a large TAM to support this kind of investment, and you’ve got to have a pretty good gross margin on the product base to support this kind of investment,” he said. "These types of dynamics are shaping this consolidation effect."

Johnson adds that "the guys that are making the chips" are facing an increasingly difficult decision: 'Do I go with the leading edge or don’t I?' He said we’ve been seeing the effects of that decision for some time. "Looking at the lag between when the first company beings producing at a given node – and of course that has always been Intel – and when 10% of the AASP design starts have occurred at the node. The 10% is a fairly arbitrary number but it indicates a fairly reasonable change for actually getting volume production happening at that node. At 130 nm, the industry was in lock-step. By 90/65 nm, we have a two year lag for the AASPs which largely determines foundry production to start getting their designs in behind the industry leaders. By 32 nm, we’re thinking that’s going to be a four year lag. If the foundry sweet spot, and the sweet spot of the AASPs and the ASICs that addresss some of the key consumer markets and mobile markets are actually be going to be running behind the leading edge. They’re not going to be leading edge when they start getting good volume," Johnson said.

Conclusion: Within five years, the ability of the industry to stand the traditional Moore’s Law technology curve will depend not upon the laws of physics. The real question is how do we pay for it and how to fund the necessary R&D to get there.

One bright spot: through-silicon vias (TSV) and 3D integration, which have the ability to increase functionality equivalent to a move to a new technology node. “In the past we were very cautious on TSV. We’ve become a lot more positive,” Jones said.