Getting Fired up About Solar at EUPVSEC

The EUPVSEC (European photovoltaic solar energy conference and exhibition) was well attended, with 4000 registrants from 73 countries. More than 39% were from Germany and only 11% from the U.S. 943 exhibitors represented 34 countries, 49% from Germany, 10% from China and 9% from the U.S. By my rough estimate, about 1/3 of the exhibitors were pv cell/module suppliers, predominantly crystalline silicon, the rest thin film solar. The other 2/3ds were equipment and materials suppliers, along with quite a few BOS suppliers (inverters and the like).

It was like drinking from the proverbial fire hose in some ways, but whether through luck or my natural inclination, I wound up speaking with quite a few people involved in one particular aspect of the manufacturing business: the screen printing/drying/firing of conductive pastes. This blog will provide off-the-cuff take-aways from those conversations.

To digress just slightly, I can say that crystalline silicon is alive and well. There’s no question that much of the new capacity that has been recently added or is in the works is crystalline silicon (mostly mulitcrsytalline but some poly). Much of the focus of new equipment introductions is indeed aimed at that market – not so much in terms of advancing the technology (although there was some of that in terms as such “advanced” tech as more sophisticated process control) but more on increasing throughput and reducing breakage.

Throughput is frankly staggering compared to what’s found in semiconductor manufacturing. Typically numbers are 2400 wafers per hour, with capability to extend to more than 3000 wafers per hour. Almost all tools are belt-drive in-line tools (at least in screen printing/drying/firing). Increasing throughput is typically a matter of adding more modules to the in-line system: wafers need to see a certain amount of temperature over time so a longer furnace/firing section enables the wafers to be pushed through faster yet see the same amount of temperature (or the same amount of heat to be more precise).

Throughput can also be increased by putting two or three wafers across the belt instead of just one, as least in the drying/firing stage. The challenge in doing so is that the volatile organic compounds (VOCs) produced as the paste cures are fairly nasty to handle. They are can collect on chamber surfaces and then drop onto the wafer (if not properly removed) and I suppose pose some health hazards (if I was working with these machines on a daily basis I’d be VERY concerned about how these VOCs are captured and exhausted and potential exposure levels).

Now for a word about printing conductive pastes. Silver-based pastes go on the top of the wafer in thin grid lines and thicker bus bars. Aluminum-based pastes go on the back of the wafer in a blanket film (the whole thing forming a simple p-n junction).

Because it’s desirable to block as little light as possible from entering the cell, the top lines should be very thin. Yet, they need to carrying an acceptable amount of current for optimal efficiency. Because screen printers can only deposit films with a thickness of about 20-25 microns, a double print process has come into play, where the bottom line is printed and dried. The wafers are flipped and the backside contact is applied and dried. Again the wafers are flipped and a second front side line is applied directly on top of the first. It’s desirable for this line to be “high and tight” with straight vertical profiles to maximize conductivity.

An added complexity to this whole scenario is that there’s a push to make wafers thinner in order to minimize costs/achieve optimal out put of the wafering process (wafers are typically sawn with a wire saw from a brick into wafers – making them thinner means more wafers/brick). Wafers are now typically 190-200 microns thick. There’s a push to make then 140 microns or thinner. This, of course, increase the chance of the inevitable breakage. “Acceptable” breakage numbers I heard at the show range from 1 in 3000 to 1 in 5000 to 1 in 10000. The suppliers I talked to seemed confident about the ability to keep breakage under control, it being mostly a matter of how the wafers are handed off to and from a fast and slow belt respectively (machines may have three different belts moving at different speeds to optimize drying/firing conditions).

Work is underway to develop new conductive pastes that provides a better profile control when printed in thick layers. Sources say 5-6 suppliers are pursuing new technologies, some including nanocomposites to achieve the desired results. It’s not all that different from the conductive pastes used in surface mount technology, so perhaps my colleagues at SMT might have some insight here.

One final note: the heating technology used in drying and firing furnaces is typically either convection heating, infrared lamps or uv lamps. Surprisingly, there was little discussion about many of the things that are well known issues in the semiconductor such as the size of the grain, grain boundary interfaces, the structure of the grain, etc., all of which can have a significant impact on resistivity.

One postscript: IMEC was promoting the idea of electrochemical deposition of copper lines as an alternative to silver. Copper lines are cheaper and can easily be printed at finer dimensions. Also new: Applied Materials introduced the concept that it was possible to achieve higher efficiencies, but by going from 9 process steps to 14. No doubt this is true, but guess who would supply the five new steps?!?

More later… all I can say is I am fired up about PV (in my best Governator accent).